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PI6C20800BAEX 封装TSSOP48 DIODES/美台时钟缓冲器芯片

PI6C20800BAEX 封装TSSOP48 DIODES/美台时钟缓冲器芯片

PI6C20800BAEX 封装TSSOP48 DIODES/美台时钟缓冲器芯片

PI6C20800BAEX 封装TSSOP48 DIODES/美台时钟缓冲器芯片

PCI Express® 3.0 1:8 HCSL Clock Buffer
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通盛 产品介绍

Product index

PI6C20800B is a PCIe 3.0 compliant, high-speed, low-noise differential clock buffer designed to be a companion to PCI Express 3.0 clock generator for Intel server chipsets. The device distributes the differential SRC clock from PCIe clock generator to eight differential pairs of clock outputs either with or without PLL. The input SRC clock can be divided by 2 when SRC_DIV# is LOW. The clock outputs are controlled by input selection of SRC_ STOP#, PWRDWN# and SMBus, SCLK and SDA. When input of either SRC_STOP# or PWRDWN# is LOW, the output clocks are Tristated. When PWRDWN# is LOW, the SDA and SCLK inputs antimony compounds. Block Diagram

通盛 订购信息

ordering information
器件类目 产品型号 封装描述 包装数 是否在产 应用 丝印
时钟缓冲器
PI6C20800BAEX 

TSSOP48

-

打印机和扫描仪 

PI6C20800BAEX

通盛管脚排列

Pin Configuration

resource/images/bc05c09e626d4a5b9ec0425f48393a78_44.jpg

通盛 产品特性

Product characteristics
3.3V Operation
PLL or Fanout operation
Power Management Control
Outputs Tristate control via SMBus
Output Enable for all outputs
Low Cycle-to-cycle jitter < 60ps
Eight Pairs of Differential Clocks
Phase jitter filter for PCIe 3.0 application

通盛 应用范围

Scope of application

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